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authorWolfgang Draxinger <Wolfgang.Draxinger@draxit.de>2011-11-16 15:32:38 +0100
committerWolfgang Draxinger <Wolfgang.Draxinger@draxit.de>2011-11-16 15:32:38 +0100
commit374241100b88117b040498516da103723a80dd67 (patch)
tree408b729f99d7556c4aab50329ba96076ab941efe
parent40c7b3ed075246b352b98c46869d4293af309606 (diff)
downloadPyPhytron-374241100b88117b040498516da103723a80dd67.tar.gz
PyPhytron-374241100b88117b040498516da103723a80dd67.tar.bz2
removed import of module 'exceptions', uses built-in type. Initiator names now verbose ('minus' and 'plus')
-rw-r--r--Phytron.py28
1 files changed, 14 insertions, 14 deletions
diff --git a/Phytron.py b/Phytron.py
index 3bed11e..7564cf2 100644
--- a/Phytron.py
+++ b/Phytron.py
@@ -1,27 +1,27 @@
-import serial, string, exceptions
+import serial, string
-class ReceiveTimeout(exceptions.Exception):
+class ReceiveTimeout(Exception):
pass
-class ReceiveChecksumError(exceptions.Exception):
+class ReceiveChecksumError(Exception):
def __init__(self, expected, received):
self.expected = expected
self.received = received
self.message = "Checksum Error: expected %x, got %x" % (expected, received)
-class RXBufferOverrunError(exceptions.EnvironmentError):
+class RXBufferOverrunError(EnvironmentError):
pass
-class NotNowWarning(exceptions.UserWarning):
+class NotNowWarning(UserWarning):
pass
-class UnknownCommand(exceptions.Exception):
+class UnknownCommand(Exception):
pass
-class BadValueError(exceptions.Exception):
+class BadValueError(Exception):
pass
-class ParameterLimitsError(exceptions.ValueError):
+class ParameterLimitsError(ValueError):
pass
class Axis:
@@ -66,8 +66,8 @@ class Status:
RX_ERROR = (1<<5)
SFI_ERROR = (1<<4)
OUTPUTSTAGE_ERROR = (1<<3)
- INITIATOR_M = (1<<2)
- INITIATOR_P = (1<<1)
+ INITIATOR_MINUS = (1<<2)
+ INITIATOR_PLUS = (1<<1)
RUNNING = (1<<0)
def __init__(self, bitvector):
self.coldboot = not not (bitvector & Status.COLDBOOT)
@@ -75,8 +75,8 @@ class Status:
self.rx_error = not not (bitvector & Status.RX_ERROR)
self.SFI_error = not not (bitvector & Status.SFI_ERROR)
self.outputstage_error = not not (bitvector & Status.OUTPUTSTAGE_ERROR)
- self.initiator_m = not not (bitvector & Status.INITIATOR_M)
- self.initiator_p = not not (bitvector & Status.INITIATOR_P)
+ self.initiator_minus = not not (bitvector & Status.INITIATOR_MINUS)
+ self.initiator_plus = not not (bitvector & Status.INITIATOR_PLUS)
self.running = not not (bitvector & Status.RUNNING)
def __str__(self):
@@ -91,9 +91,9 @@ class Status:
status += ['SFI Error']
if self.outputstage_error:
status += ['Output Stage Error']
- if self.initiator_m:
+ if self.initiator_minus:
status += ['Initiator -']
- if self.initiator_p:
+ if self.initiator_plus:
status += ['Initiator +']
if self.running:
status += ['Running']