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* tccasm: Accept suffixed cmovCCMichael Matz2017-12-031-4/+14
| | | | | | | The length suffix for cmovCC isn't necessary as the required register operands always allow length deduction. But let's be nice to users and accept them anyway. Do that without blowing up tables, which means we don't detect invalid suffixes for the given operands, but so be it.
* tccasm: Unify C and asm symbol tableMichael Matz2017-11-271-8/+7
| | | | | | | | | | This makes the asm symbols use the same members as the C symbols for global decls, e.g. using the ELF symbol to hold offset and section. That allows us to use only one symbol table for C and asm symbols and to get rid of hacks to synch between them. We still need some special handling for symbols that come purely from asm sources.
* Spelling fixes in C comments onlyLarry Doolittle2017-05-071-1/+1
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* Fix a warningMichael Matz2017-05-081-1/+1
| | | | | | "missing intitializer for field op_type" with gcc -Wextra. It's zero-initialized anyway, and not that much a hassle to explicitely initialize either, so let's be nice and make it not warn.
* tcc: fixup clang warningsAndrei Warkentin2017-04-251-5/+5
| | | | | | | | | | | The O(xxx) stuff in i386-asm.c had me scratching my head. Extracting the macro and trying it out in a separate program doesn't give me any warnings, so I'm confused about what could be going on there. Any cast will make things happy. I used a uint64_t to catch actual cases of overflow, which will still cause a -Wconstant-conversion warning. Signed-off-by: Andrei Warkentin <andrey.warkentin@gmail.com>
* x86-64-asm: Fix mov im64,rax encodingMichael Matz2017-02-231-4/+7
| | | | | | | the avoidance of mov im32->reg64 wasn't working when reg64 was rax. While fixing this also fix instructions which had the REX prefix hardcoded in opcode and so didn't support extended registers which would have added another REX prefix.
* x86-asm: Fix segfaultMichael Matz2016-12-151-1/+1
| | | | We need to access cur_text_section, not text_section.
* x86-64-asm: Accept high register in clobbersMichael Matz2016-12-151-17/+28
| | | | | | | The callee saved registers (among them r12-r15) really need saving/restoring if mentioned in asm clobbers, even if TCC itself doesn't use them. E.g. the linux kernel relies on that in its switch_to() implementation.
* Support local register variablesMichael Matz2016-12-151-0/+33
| | | | | | | | | Similar to GCC a local asm register variable enforces the use of a specified register in asm operands (and doesn't otherwise matter). Works only if the variable is directly mentioned as operand. For that we now generally store a backpointer from an SValue to a Sym when the SValue was the result of unary() parsing a symbol identifier.
* x86-asm: Correct register size for pointer opsMichael Matz2016-12-151-1/+2
| | | | | A pointer is 64 bit as well, so it needs a full register for register operands.
* x86_64-asm: fix copy-out registersMichael Matz2016-12-151-0/+2
| | | | | | If the destination is an indirect pointer access (which ends up as VT_LLOCAL) the intermediate pointer must be loaded as VT_PTR, not as whatever the pointed to type is.
* tccasm: Support refs to anon symbols from asmMichael Matz2016-12-151-2/+11
| | | | | | | This happens when e.g. string constants (or other static data) are passed as operands to inline asm as immediates. The produced symbol ref wouldn't be found. So tighten the connection between C and asm-local symbol table even more.
* x86-asm: Accept all 32bit immediatesMichael Matz2016-12-151-1/+1
| | | | | In particular don't care if they're signed or unsigned, they're all acceptable as immediates.
* x86-asm: Correctly infer register size for boolsMichael Matz2016-12-151-1/+2
| | | | | | Register operands of type _Bool weren't correctly getting the 8-bit sized registers (but rather used the default 32-bit ones).
* x86-64-asm: Fix ltr/str and push/pop operandsMichael Matz2016-12-151-0/+3
| | | | | str accepts rm16/r32/r64, and push/pop defaults to 64 when given memory operands (to 32 on i386).
* x86-64-asm: Implement high %cr registersMichael Matz2016-12-151-4/+11
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* x86-64-asm: Support high registers %r8 - %r15Michael Matz2016-12-151-40/+170
| | | | | | | This requires correctly handling the REX prefix. As bonus we now also support the four 8bit registers spl,bpl,sil,dil, which are decoded as ah,ch,dh,bh in non-long-mode (and require a REX prefix as well).
* inline-asm: Accept "flags" clobberMichael Matz2016-12-151-2/+3
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* x86-asm: Fix lar opcode operandsMichael Matz2016-12-151-1/+5
| | | | | | | lar can accept multiple sizes as well (wlx), like lsl. When using autosize it's important to look at the destination operand first; when it's a register that one determines the size, not the input operand.
* inline asm: Accept 'R' constraintMichael Matz2016-12-151-0/+2
| | | | | This is like 'r' but only accepts the eight legacy regs. Currently that's the same as 'r' because we don't support the high ones.
* inline asm: Accept "e" constraintMichael Matz2016-12-151-0/+2
| | | | | This is meant to be a (sign-extended) 32bit constant (possibly symbolic). We don't do any checks and simply regard it as "i".
* inline asm: Fix 'P' and accept some r<nr> registersMichael Matz2016-12-151-1/+9
| | | | | | A 'P' template modifier should avoid adding a '$' to literal arguments. Also accept the numbered r8+ registers in an inline asm clobber list (ignoring them for now).
* x86-64-asm: More opcodesMichael Matz2016-12-151-0/+9
| | | | Implement some more opcodes, syscall, sysret, lfence, mfence, sfence.
* x86-64-asm: Accept expressions for .quadMichael Matz2016-12-151-1/+1
| | | | | The x86-64 target has 64bit relocs, and hence can accept generic expressions for '.quad'.
* inline asm: Accept 'p' constraint and 'P' template modMichael Matz2016-12-151-0/+2
| | | | | 'p' is conservatively the same as 'r' and 'P' as template modifier can be ignored in TCC.
* Accept more asm expressionsMichael Matz2016-12-151-5/+9
| | | | | | In particular subtracting a defined symbol from current section makes the value PC relative, and .org accepts symbolic expressions as well, if the symbol is from the current section.
* x86-asm: Get rid of OPC_JMP and OPC_SHORTJMPMichael Matz2016-12-151-10/+10
| | | | | Those two insn types are nicer to handle as operand types, because the pressure for bits on instr_type is higher than for operands.
* x86-asm: Remove OPC_D16Michael Matz2016-12-151-2/+1
| | | | | Now that we can store prefixes even for 0x0fXX opcodes we can remove the OPC_D16 bit.
* x86-asm: Reorganize instr_typeMichael Matz2016-12-151-44/+63
| | | | | | | | | Disjoint instruction types don't need to be a bit field, so introduce an enumeration (3 bits). Also the 0x0f prefix can be expressed by a bit, doesn't need a byte in the opcode field. That enables to encode further prefixes still in 16 bit. To not have to touch all insns do some macro fiddling filtering out a 0x0f byte in the second position.
* x86-asm: move stats codeMichael Matz2016-12-151-0/+40
| | | | | The old place (tccasm.c) didn't have access to the variables anymore and was ifdefed out. Move it to i386-asm.c.
* x86-asm: Add more SSE2 instructionsMichael Matz2016-12-151-1/+18
| | | | | | | | In particular those that are extensions of existing mmx (or sse1) instructions by a simple 0x66 prefix. There's one caveat for x86-64: as we don't yet correctly handle the 0xf3 prefix the movq mem64->xmm is wrong (tested in asmtest.S). Needs some refactoring of the instr_type member.
* tccelf: introduce add32/64le()grischka2016-11-201-1/+1
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* x86_64-asm: =m operand fixesgrischka2016-11-201-27/+48
| | | | | | | | | | | | | | | | | | | | | | The problem was with tcctest.c: unsigned set; __asm__("btsl %1,%0" : "=m"(set) : "Ir"(20) : "cc"); when with tcc compiled with the HAVE_SELINUX option, run with tcc -run, it would use large addresses far beyond the 32bits range when tcc did not use the pc-relative mode for accessing 'set' in global data memory. In fact the assembler did not know about %rip at all. Changes: - memory operands use (%rax) not (%eax) - conversion from VT_LLOCAL: use type VT_PTR - support 'k' modifier - support %rip register - support X(%rip) pc-relative addresses The test in tcctest.c is from Michael Matz.
* x86-asm: Reject some invalid arith imm8 instructionMichael Matz2016-05-161-0/+7
| | | | | | | There were two errors in the arithmetic imm8 instruction. They accept only REGW, and in case the user write a xxxb opcode that variant needs to be rejected as well (it's not automatically rejected by REGW in case the destination is memory).
* x86-asm: Fix signed constants and opcode orderMichael Matz2016-05-141-1/+3
| | | | | | | | Two things: negative constants were rejected (e.g. "add $-15,%eax"). Second the insn order was such that the arithmetic IM8S forms weren't used (always the IM32 ones). Switching them prefers those but requires a fix for size calculation in case the opcodes were OPC_ARITH and OPC_WLX (whose size starts with 1, not zero).
* x86-asm: Consolidate insn descriptionsMichael Matz2016-05-141-0/+2
| | | | | Use OPC_BWLX and OPC_WLX in i386-asm.h and x86_64-asm.h to reduce number of differences between both.
* x86-64-asm: Clean up 64bit immediate supportMichael Matz2016-05-111-18/+16
| | | | | | | | | Fix it to actually be able to parse 64bit immediates (enlarge operand value type). Then, generally there's no need for accepting IM64 anywhere, except in the 0xba+r mov opcodes, so OP_IM is unnecessary, as is OPT_IMNO64. Improve the generated code a bit by preferring the 0xc7 opcode for im32->reg64, instead of the im64->reg64 form (which we therefore hardcode).
* x86-asm: Get rid of is_short_jumpMichael Matz2016-05-111-7/+4
| | | | Can be implemented differently.
* x86-asm: Remove old ASM_16 codeMichael Matz2016-05-111-185/+6
| | | | | | This code was inactive since a long time (and was deactivated because it was wrong to start with) and just clutters the sources. Remove it.
* x86-64: Run asmtest as wellMichael Matz2016-05-111-0/+4
| | | | | This fixes and activates the asm test that's part of tcctest.c also on x86-64, requiring a small fix for the 'm' constraint.
* x86-64 asm: Remove useless jmp opcodeMichael Matz2016-05-111-7/+0
| | | | | Also remove the hacky mod/rm byte emission during disp/imm writing.
* x86: Improve cmov handlingMichael Matz2016-05-111-0/+5
| | | | | cmov can accept multi sizes, but is also a OPC_TEST opcode, deal with this.
* [x86] Fix some asm problemsMichael Matz2016-05-091-16/+71
| | | | | | | | | | | A bag of assembler fixes, to be either compatible with GAS (e.g. order of 'test' operands), accept more instructions, count correct foo{bwlq} variants on x86_64, fix modrm/sib bytes on x86_64 to not use %rip relative addressing mode, to not use invalid insns in tests/asmtest.S for x86_64. Result is that now output of GAS and of tcc on tests/asmtest.S is mostly the same.
* Improve hash performanceVlad Vissoultchev2016-04-171-5/+5
| | | | | | | | | | | | - better `TOK_HASH_FUNC` - increases `hash_ident` initial size to 16k (from 8k) - `cstr_cat` uses single `realloc` + `memcpy` - `cstr_cat` can append terminating zero - `tok_str_realloc` initial size to 16 (from 8) - `parse_define` uses static `tokstr_buf` - `next` uses static `tokstr_buf` - fixes two latent bugs (wrong deallocations in libtcc.c:482 and tccpp.c:2987)
* Change the way struct CStrings are handled.Edmund Grimley Evans2015-11-261-1/+1
| | | | | | | | | A CString used to be copied into a token string, which is an int array. On a 64-bit architecture the pointers were misaligned, so ASan gave lots of warnings. On a 64-bit architecture that required memory accesses to be correctly aligned it would not work at all. The CString is now included in CValue instead.
* Merge the integer members of union CValue into "uint64_t i".Edmund Grimley Evans2015-11-171-5/+5
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* Revert all of my changes to directories & codingstyle.gus knight2015-07-291-0/+1502
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* Reorganize the source tree.gus knight2015-07-271-1502/+0
| | | | | | | | | | * Documentation is now in "docs". * Source code is now in "src". * Misc. fixes here and there so that everything still works. I think I got everything in this commit, but I only tested this on Linux (Make) and Windows (CMake), so I might've messed something up on other platforms...
* Trim trailing spaces everywhere.gus knight2015-07-271-1/+1
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* Convert some lines from ISO-8859-1 to UTF-8.Edmund Grimley Evans2015-03-111-1/+1
| | | | | | | | perl -i -pe 'use Text::Iconv; $c1 = Text::Iconv->new("utf-8", "utf-8"); $c2 = Text::Iconv->new("iso-8859-1", "utf-8"); if (!$c1->convert($_)) { $_ = $c2->convert($_); }' \ `find * -type f`