| Commit message (Collapse) | Author | Age | Files | Lines |
| |
|
|
|
|
|
| |
This requires correctly handling the REX prefix.
As bonus we now also support the four 8bit registers
spl,bpl,sil,dil, which are decoded as ah,ch,dh,bh in non-long-mode
(and require a REX prefix as well).
|
| | |
|
| |
|
|
|
|
|
| |
lar can accept multiple sizes as well (wlx), like lsl. When using
autosize it's important to look at the destination operand first;
when it's a register that one determines the size, not the input
operand.
|
| |
|
|
|
| |
This is like 'r' but only accepts the eight legacy regs. Currently
that's the same as 'r' because we don't support the high ones.
|
| |
|
|
|
| |
This is meant to be a (sign-extended) 32bit constant (possibly
symbolic). We don't do any checks and simply regard it as "i".
|
| |
|
|
|
|
| |
A 'P' template modifier should avoid adding a '$' to literal
arguments. Also accept the numbered r8+ registers in an inline
asm clobber list (ignoring them for now).
|
| |
|
|
| |
Implement some more opcodes, syscall, sysret, lfence, mfence, sfence.
|
| |
|
|
|
| |
The x86-64 target has 64bit relocs, and hence can accept
generic expressions for '.quad'.
|
| |
|
|
|
| |
'p' is conservatively the same as 'r' and 'P' as template
modifier can be ignored in TCC.
|
| |
|
|
|
|
| |
In particular subtracting a defined symbol from current section
makes the value PC relative, and .org accepts symbolic expressions
as well, if the symbol is from the current section.
|
| |
|
|
|
| |
Those two insn types are nicer to handle as operand types, because
the pressure for bits on instr_type is higher than for operands.
|
| |
|
|
|
| |
Now that we can store prefixes even for 0x0fXX opcodes we can remove
the OPC_D16 bit.
|
| |
|
|
|
|
|
|
|
| |
Disjoint instruction types don't need to be a bit field, so
introduce an enumeration (3 bits). Also the 0x0f prefix can
be expressed by a bit, doesn't need a byte in the opcode field.
That enables to encode further prefixes still in 16 bit.
To not have to touch all insns do some macro fiddling filtering
out a 0x0f byte in the second position.
|
| |
|
|
|
| |
The old place (tccasm.c) didn't have access to the variables anymore
and was ifdefed out. Move it to i386-asm.c.
|
| |
|
|
|
|
|
|
| |
In particular those that are extensions of existing mmx (or sse1)
instructions by a simple 0x66 prefix. There's one caveat for
x86-64: as we don't yet correctly handle the 0xf3 prefix
the movq mem64->xmm is wrong (tested in asmtest.S). Needs
some refactoring of the instr_type member.
|
| | |
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
The problem was with tcctest.c:
unsigned set;
__asm__("btsl %1,%0" : "=m"(set) : "Ir"(20) : "cc");
when with tcc compiled with the HAVE_SELINUX option, run with
tcc -run, it would use large addresses far beyond the 32bits
range when tcc did not use the pc-relative mode for accessing
'set' in global data memory. In fact the assembler did not
know about %rip at all.
Changes:
- memory operands use (%rax) not (%eax)
- conversion from VT_LLOCAL: use type VT_PTR
- support 'k' modifier
- support %rip register
- support X(%rip) pc-relative addresses
The test in tcctest.c is from Michael Matz.
|
| |
|
|
|
|
|
| |
There were two errors in the arithmetic imm8 instruction. They accept
only REGW, and in case the user write a xxxb opcode that variant
needs to be rejected as well (it's not automatically rejected by REGW
in case the destination is memory).
|
| |
|
|
|
|
|
|
| |
Two things: negative constants were rejected (e.g. "add $-15,%eax").
Second the insn order was such that the arithmetic IM8S forms
weren't used (always the IM32 ones). Switching them prefers those
but requires a fix for size calculation in case the opcodes were
OPC_ARITH and OPC_WLX (whose size starts with 1, not zero).
|
| |
|
|
|
| |
Use OPC_BWLX and OPC_WLX in i386-asm.h and x86_64-asm.h to
reduce number of differences between both.
|
| |
|
|
|
|
|
|
|
| |
Fix it to actually be able to parse 64bit immediates (enlarge
operand value type). Then, generally there's no need for accepting
IM64 anywhere, except in the 0xba+r mov opcodes, so OP_IM is
unnecessary, as is OPT_IMNO64. Improve the generated code a bit
by preferring the 0xc7 opcode for im32->reg64, instead of the
im64->reg64 form (which we therefore hardcode).
|
| |
|
|
| |
Can be implemented differently.
|
| |
|
|
|
|
| |
This code was inactive since a long time (and was deactivated because
it was wrong to start with) and just clutters the sources. Remove
it.
|
| |
|
|
|
| |
This fixes and activates the asm test that's part of tcctest.c
also on x86-64, requiring a small fix for the 'm' constraint.
|
| |
|
|
|
| |
Also remove the hacky mod/rm byte emission during
disp/imm writing.
|
| |
|
|
|
| |
cmov can accept multi sizes, but is also a OPC_TEST opcode,
deal with this.
|
| |
|
|
|
|
|
|
|
|
|
| |
A bag of assembler fixes, to be either compatible with GAS
(e.g. order of 'test' operands), accept more instructions,
count correct foo{bwlq} variants on x86_64, fix modrm/sib bytes
on x86_64 to not use %rip relative addressing mode, to not use
invalid insns in tests/asmtest.S for x86_64.
Result is that now output of GAS and of tcc on tests/asmtest.S
is mostly the same.
|
| |
|
|
|
|
|
|
|
|
|
|
| |
- better `TOK_HASH_FUNC`
- increases `hash_ident` initial size to 16k (from 8k)
- `cstr_cat` uses single `realloc` + `memcpy`
- `cstr_cat` can append terminating zero
- `tok_str_realloc` initial size to 16 (from 8)
- `parse_define` uses static `tokstr_buf`
- `next` uses static `tokstr_buf`
- fixes two latent bugs (wrong deallocations in libtcc.c:482 and
tccpp.c:2987)
|
| |
|
|
|
|
|
|
|
| |
A CString used to be copied into a token string, which is an int array.
On a 64-bit architecture the pointers were misaligned, so ASan gave
lots of warnings. On a 64-bit architecture that required memory
accesses to be correctly aligned it would not work at all.
The CString is now included in CValue instead.
|
| | |
|
| | |
|
| |
|
|
|
|
|
|
|
|
| |
* Documentation is now in "docs".
* Source code is now in "src".
* Misc. fixes here and there so that everything still works.
I think I got everything in this commit, but I only tested this
on Linux (Make) and Windows (CMake), so I might've messed
something up on other platforms...
|
| | |
|
| |
|
|
|
|
|
|
| |
perl -i -pe 'use Text::Iconv;
$c1 = Text::Iconv->new("utf-8", "utf-8");
$c2 = Text::Iconv->new("iso-8859-1", "utf-8");
if (!$c1->convert($_)) { $_ = $c2->convert($_); }' \
`find * -type f`
|
| | |
|
| |
|
|
|
|
| |
Display a different warning when an instruction is recognized by tcc but
the operands found do not correspond to the constraints of the
instruction.
|
| |
|
|
|
|
|
| |
avoid c++/c99 style comments in preprocessor directives
avoid leadings whitespaces in preprocessor directives
mention implemented variable length arrays in documentation
fixed ambiguous option in texi2html call (Austin English)
|
| | |
|
| | |
|
| | |
|
| |
|
|
|
|
|
|
|
| |
This enables native unwind semantics with longjmp on
win64 by putting an entry into the .pdata section for
each compiled fuction.
Also, the function now use a fixed stack and store arguments
into X(%rsp) rather than using push.
|
| |
|
|
| |
If you want that, run: make NOTALLINONE=1
|
| |
|
|
|
| |
Also, disable 16bit support for now as it causes bugs
in 32bit mode. #define I386_ASM_16 if you want it.
|
| |
|
|
|
|
| |
With imul the 3rd operand defaults to the 2nd on. The previous
logic left 'op_type[2]' uninitialized which caused the bug to
show up only sometimes.
|
| | |
|
| |
|
|
|
|
|
| |
The new 16bit code was causing wrong 0x66 prefixes
in 32bit code.
The fix possibly breaks the feature on 16bit asm.
|
| |
|
|
| |
Signed-off-by: aldot <rep.dot.nop@gmail.com>
|
| | |
|
| | |
|
| | |
|