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authorgrischka <grischka>2017-07-23 21:24:11 +0200
committergrischka <grischka>2017-07-23 21:24:11 +0200
commit4b3c6e74aba07d61e91b2e0ba7190483a0f9f000 (patch)
tree8e91e83762d9c60dd81182b9d423f8addb3532f2 /tccgen.c
parentfdc18d307aafce6e8833b0eb26c1313da88cfc9a (diff)
downloadtinycc-4b3c6e74aba07d61e91b2e0ba7190483a0f9f000.tar.gz
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tccgen: nodata_wanted fix, default ONE_SOURCE, etc...
tccgen.c: doubles need to be aligned, on ARM. The section_reserve() in init_putv does not do that. -D ONE_SOURCE: is now the default and not longer needed. Also, tcc.h now sets the default native target. These both make compiling tcc simple as "gcc tcc.c -o tcc -ldl" again. arm-asm.c: enable pseudo asm also for inline asm tests/tests2/Makefile: disable bitfield tests except on windows and x86_64 and don't generate-always tcc.c: fix a loop with -dt on errors configure: print compiler version (as recognized) tccpp.c: actually define symbols for tcc -dt clear static variables (needed for -dt or libtcc usage) 96_nodata_wanted.c: use __label__ instead of asm lib/files: use native symbols (__i386__ etc.) instead of TCC_TARGET_...
Diffstat (limited to 'tccgen.c')
-rw-r--r--tccgen.c15
1 files changed, 11 insertions, 4 deletions
diff --git a/tccgen.c b/tccgen.c
index 2754192..0828820 100644
--- a/tccgen.c
+++ b/tccgen.c
@@ -1218,12 +1218,16 @@ ST_FUNC int gv(int rc)
} else {
if (is_float(vtop->type.t) &&
(vtop->r & (VT_VALMASK | VT_LVAL)) == VT_CONST) {
+ unsigned long offset;
/* CPUs usually cannot use float constants, so we store them
generically in data segment */
size = type_size(&vtop->type, &align);
- vpush_ref(&vtop->type, data_section, data_section->data_offset, size);
+ if (NODATA_WANTED)
+ size = 0, align = 1;
+ offset = section_add(data_section, size, align);
+ vpush_ref(&vtop->type, data_section, offset, size);
vswap();
- init_putv(&vtop->type, data_section, data_section->data_offset);
+ init_putv(&vtop->type, data_section, offset);
vtop->r |= VT_LVAL;
}
#ifdef CONFIG_TCC_BCHECK
@@ -3518,8 +3522,11 @@ static void struct_layout(CType *type, AttributeDef *ad)
/* In PCC layout named bit-fields influence the alignment
of the containing struct using the base types alignment,
except for packed fields (which here have correct align). */
- if (f->v & SYM_FIRST_ANOM)
+ if (f->v & SYM_FIRST_ANOM
+ // && bit_size // ??? gcc on ARM/rpi does that
+ )
align = 1;
+
} else {
bt = f->type.t & VT_BTYPE;
if ((bit_pos + bit_size > size * 8)
@@ -3610,7 +3617,7 @@ static void struct_layout(CType *type, AttributeDef *ad)
if (a < maxalign)
a = maxalign;
type->ref->r = a;
- if (pragma_pack && pragma_pack < maxalign) {
+ if (pragma_pack && pragma_pack < maxalign && 0 == pcc) {
/* can happen if individual align for some member was given. In
this case MSVC ignores maxalign when aligning the size */
a = pragma_pack;