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| author | Michael Matz <matz@suse.de> | 2016-07-11 21:41:15 +0200 |
|---|---|---|
| committer | Michael Matz <matz@suse.de> | 2016-12-15 17:47:08 +0100 |
| commit | 5692716770e9e2e733d0e7ab6ce0bd70cb830aba (patch) | |
| tree | 7b3b856046c5052a9e416389758f5ada4a6ba52f /i386-asm.c | |
| parent | e3f2a683113bb28bc1e9820dfe18d3bd8e0156d2 (diff) | |
| download | tinycc-5692716770e9e2e733d0e7ab6ce0bd70cb830aba.tar.gz tinycc-5692716770e9e2e733d0e7ab6ce0bd70cb830aba.tar.bz2 | |
x86-asm: Fix lar opcode operands
lar can accept multiple sizes as well (wlx), like lsl. When using
autosize it's important to look at the destination operand first;
when it's a register that one determines the size, not the input
operand.
Diffstat (limited to 'i386-asm.c')
| -rw-r--r-- | i386-asm.c | 6 |
1 files changed, 5 insertions, 1 deletions
@@ -733,7 +733,11 @@ ST_FUNC void asm_opcode(TCCState *s1, int opcode) autosize = NBWLX-2; #endif if (s == autosize) { - for(i = 0; s == autosize && i < nb_ops; i++) { + /* Check for register operands providing hints about the size. + Start from the end, i.e. destination operands. This matters + only for opcodes accepting different sized registers, lar and lsl + are such opcodes. */ + for(i = nb_ops - 1; s == autosize && i >= 0; i--) { if ((ops[i].type & OP_REG) && !(op_type[i] & (OP_CL | OP_DX))) s = reg_to_size[ops[i].type & OP_REG]; } |
