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authorbellard <bellard>2004-11-07 15:43:15 +0000
committerbellard <bellard>2004-11-07 15:43:15 +0000
commit6bbfb8f6100b99fc46067fe938e898a3e4c0b9c0 (patch)
treee658f2dc456b280b301c3108e08ccb8ceec68ce9
parent1d0e5e8b01f24b2416d5ad1ee98544a4b1ba8dab (diff)
downloadtinycc-6bbfb8f6100b99fc46067fe938e898a3e4c0b9c0.tar.gz
tinycc-6bbfb8f6100b99fc46067fe938e898a3e4c0b9c0.tar.bz2
removed warnings
-rw-r--r--arm-gen.c8
-rw-r--r--c67-gen.c12
-rw-r--r--tccelf.c7
3 files changed, 18 insertions, 9 deletions
diff --git a/arm-gen.c b/arm-gen.c
index 0766222..f657331 100644
--- a/arm-gen.c
+++ b/arm-gen.c
@@ -136,7 +136,8 @@ void o(unsigned long i)
static unsigned long stuff_const(unsigned long op,unsigned long c)
{
int try_neg=0;
- unsigned long nc,negop;
+ unsigned long nc = 0,negop = 0;
+
switch(op&0x1F00000)
{
case 0x800000: //add
@@ -901,8 +902,8 @@ int gtst(int inv, int t)
/* generate an integer binary operation */
void gen_opi(int op)
{
- int c, func;
- unsigned long opc,r,fr;
+ int c, func = 0;
+ unsigned long opc = 0,r,fr;
c=0;
switch(op) {
@@ -989,6 +990,7 @@ void gen_opi(int op)
default:
opc = 0x15;
c=1;
+ break;
}
switch(c) {
case 1:
diff --git a/c67-gen.c b/c67-gen.c
index 7c92b77..40554bd 100644
--- a/c67-gen.c
+++ b/c67-gen.c
@@ -1551,7 +1551,7 @@ void C67_SHR(int r, int v)
/* load 'r' from value 'sv' */
void load(int r, SValue * sv)
{
- int v, t, ft, fc, fr, size, element;
+ int v, t, ft, fc, fr, size = 0, element;
BOOL Unsigned = false;
SValue v1;
@@ -1873,7 +1873,7 @@ static void gcall_or_jmp(int is_jmp)
context. Stack entry is popped */
void gfunc_call(int nb_args)
{
- int i, r, size;
+ int i, r, size = 0;
int args_sizes[NoCallArgsPassedOnStack];
if (nb_args > NoCallArgsPassedOnStack) {
@@ -2518,12 +2518,14 @@ void gen_cvt_ftof(int t)
r = vtop->r;
- if (r == TREG_EAX) // make sure the paired reg is avail
+ if (r == TREG_EAX) { // make sure the paired reg is avail
r2 = get_reg(RC_ECX);
- else if (r == TREG_EDX)
+ } else if (r == TREG_EDX) {
r2 = get_reg(RC_ST0);
- else
+ } else {
ALWAYS_ASSERT(FALSE);
+ r2 = 0; /* avoid warning */
+ }
C67_SPDP(r, r); // convert it to DP same register
C67_NOP(1);
diff --git a/tccelf.c b/tccelf.c
index 6f8ebdf..6ba3bf2 100644
--- a/tccelf.c
+++ b/tccelf.c
@@ -448,9 +448,12 @@ static void relocate_section(TCCState *s1, Section *s)
Section *sr;
Elf32_Rel *rel, *rel_end, *qrel;
Elf32_Sym *sym;
- int type, sym_index, esym_index;
+ int type, sym_index;
unsigned char *ptr;
unsigned long val, addr;
+#if defined(TCC_TARGET_I386)
+ int esym_index;
+#endif
sr = s->reloc;
rel_end = (Elf32_Rel *)(sr->data + sr->data_offset);
@@ -662,10 +665,12 @@ static void put32(unsigned char *p, uint32_t val)
p[3] = val >> 24;
}
+#if defined(TCC_TARGET_I386) || defined(TCC_TARGET_ARM)
static uint32_t get32(unsigned char *p)
{
return p[0] | (p[1] << 8) | (p[2] << 16) | (p[3] << 24);
}
+#endif
static void build_got(TCCState *s1)
{