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| -rw-r--r-- | COPYING | 19 | ||||
| -rw-r--r-- | README | 1 | ||||
| -rw-r--r-- | xy2cent.v | 92 |
3 files changed, 112 insertions, 0 deletions
@@ -0,0 +1,19 @@ +Copyright 2019 Wolfgang 'datenwolf' Draxinger + +Permission is hereby granted, free of charge, to any person obtaining a copy of +this software and associated documentation files (the "Software"), to deal in +the Software without restriction, including without limitation the rights to +use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies +of the Software, and to permit persons to whom the Software is furnished to do +so, subject to the following conditions: + +The above copyright notice and this permission notice shall be included in all +copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +SOFTWARE. @@ -0,0 +1 @@ +Verilog modules for generating XY2-100 compliant serial signals diff --git a/xy2cent.v b/xy2cent.v new file mode 100644 index 0000000..1de193d --- /dev/null +++ b/xy2cent.v @@ -0,0 +1,92 @@ +/* +Copyright 2019 Wolfgang 'datenwolf' Draxinger + +Permission is hereby granted, free of charge, to any person obtaining a copy of +this software and associated documentation files (the "Software"), to deal in +the Software without restriction, including without limitation the rights to +use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies +of the Software, and to permit persons to whom the Software is furnished to do +so, subject to the following conditions: + +The above copyright notice and this permission notice shall be included in all +copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +SOFTWARE. +*/ + +module xy2cent( + input[15:0] in_data_ch0, + input[15:0] in_data_ch1, + input in_data_sel, + input xy2_clk, + output xy2_syn, + output xy2_ch0, + output xy2_ch1, +); + reg[15:0] data_ch0 = 'h7FFF; + reg[15:0] data_ch1 = 'h7FFF; + + reg sr_load = 0; + reg[ 4:0] sr_bit = 0; + reg[ 1:0] sr_pty = 0; + reg[18:0] sr_ch0 = 0; + reg[18:0] sr_ch1 = 0; + + always @( posedge xy2_clk ) begin + if( sr_bit ) begin + if( 1 == sr_bit ) begin + xy2_syn <= 0; + xy2_ch0 <= sr_pty[0]; + xy2_ch1 <= sr_pty[1]; + end + else begin + xy2_syn <= 1; + xy2_ch0 <= sr_ch0[18]; + xy2_ch1 <= sr_ch1[18]; + sr_pty[0] <= sr_pty[0] + xy2_ch0; + sr_pty[1] <= sr_pty[1] + xy2_ch1; + end + sr_bit <= sr_bit - 1; + end + else begin + if( sr_load ) begin + sr_pty <= 2'b00; + xy2_ch0 <= sr_ch0[18]; + xy2_ch1 <= sr_ch1[18]; + sr_bit <= 20; + end + else begin + xy2_ch0 <= 0; + xy2_ch1 <= 0; + end + end + end + + always @( negedge xy2_clk ) begin + if( !sr_bit ) begin + sr_ch0[18:0] <= {3'b001, data_ch1[15:0]}; + sr_ch1[18:0] <= {3'b001, data_ch0[15:0]}; + sr_load <= 1; + end + else begin + if( !sr_load ) begin + sr_ch0[18:1] <= sr_ch0[17:0]; + sr_ch1[18:1] <= sr_ch1[17:0]; + end + else begin + sr_load <= 0; + end + end + end + + always @( negedge in_data_sel ) begin + data_ch0 <= in_data_ch0; + data_ch1 <= in_data_ch1; + end +endmodule |