From 4f27e217a864d8ddb74265d24a5aadea0a3ec92d Mon Sep 17 00:00:00 2001 From: Michael Matz Date: Sat, 14 May 2016 04:33:41 +0200 Subject: x86-asm: Fix signed constants and opcode order Two things: negative constants were rejected (e.g. "add $-15,%eax"). Second the insn order was such that the arithmetic IM8S forms weren't used (always the IM32 ones). Switching them prefers those but requires a fix for size calculation in case the opcodes were OPC_ARITH and OPC_WLX (whose size starts with 1, not zero). --- x86_64-asm.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'x86_64-asm.h') diff --git a/x86_64-asm.h b/x86_64-asm.h index 74bc446..c6c74e7 100644 --- a/x86_64-asm.h +++ b/x86_64-asm.h @@ -166,8 +166,8 @@ ALT(DEF_ASM_OP2(lgs, 0x0fb5, 0, OPC_MODRM, OPT_EA, OPT_REG32)) ALT(DEF_ASM_OP2(addb, 0x00, 0, OPC_ARITH | OPC_MODRM | OPC_BWLX, OPT_REG, OPT_EA | OPT_REG)) /* XXX: use D bit ? */ ALT(DEF_ASM_OP2(addb, 0x02, 0, OPC_ARITH | OPC_MODRM | OPC_BWLX, OPT_EA | OPT_REG, OPT_REG)) ALT(DEF_ASM_OP2(addb, 0x04, 0, OPC_ARITH | OPC_BWLX, OPT_IM, OPT_EAX)) -ALT(DEF_ASM_OP2(addb, 0x80, 0, OPC_ARITH | OPC_MODRM | OPC_BWLX, OPT_IM, OPT_EA | OPT_REG)) ALT(DEF_ASM_OP2(addw, 0x83, 0, OPC_ARITH | OPC_MODRM | OPC_WLX, OPT_IM8S, OPT_EA | OPT_REG)) +ALT(DEF_ASM_OP2(addb, 0x80, 0, OPC_ARITH | OPC_MODRM | OPC_BWLX, OPT_IM, OPT_EA | OPT_REG)) ALT(DEF_ASM_OP2(testb, 0x84, 0, OPC_MODRM | OPC_BWLX, OPT_REG, OPT_EA | OPT_REG)) ALT(DEF_ASM_OP2(testb, 0x84, 0, OPC_MODRM | OPC_BWLX, OPT_EA | OPT_REG, OPT_REG)) -- cgit v1.3.1