From 4f27e217a864d8ddb74265d24a5aadea0a3ec92d Mon Sep 17 00:00:00 2001 From: Michael Matz Date: Sat, 14 May 2016 04:33:41 +0200 Subject: x86-asm: Fix signed constants and opcode order Two things: negative constants were rejected (e.g. "add $-15,%eax"). Second the insn order was such that the arithmetic IM8S forms weren't used (always the IM32 ones). Switching them prefers those but requires a fix for size calculation in case the opcodes were OPC_ARITH and OPC_WLX (whose size starts with 1, not zero). --- i386-asm.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'i386-asm.c') diff --git a/i386-asm.c b/i386-asm.c index 7b92ccb..8baad47 100644 --- a/i386-asm.c +++ b/i386-asm.c @@ -355,7 +355,7 @@ static void parse_operand(TCCState *s1, Operand *op) if (op->e.v == (uint16_t)op->e.v) op->type |= OP_IM16; #ifdef TCC_TARGET_X86_64 - if (op->e.v != (uint32_t)op->e.v) + if (op->e.v != (int32_t)op->e.v) op->type = OP_IM64; #endif } @@ -551,6 +551,8 @@ ST_FUNC void asm_opcode(TCCState *s1, int opcode) if (!(opcode >= pa->sym && opcode < pa->sym + 8*NBWLX)) continue; s = (opcode - pa->sym) % NBWLX; + if ((pa->instr_type & OPC_BWLX) == OPC_WLX) + s++; } else if (pa->instr_type & OPC_SHIFT) { if (!(opcode >= pa->sym && opcode < pa->sym + 7*NBWLX)) continue; -- cgit v1.3.1