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<title>tinycc/tests/asmtest.S, branch main</title>
<subtitle>Tiny C Compiler by Fabrice Bellard Git mirror of the final release by Bellard, discarding all changes after. The repository at https://repo.or.cz/tinycc.git has become untrustworthy. Also the tcc sources have become tainted with AI slop.
</subtitle>
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<entry>
<title>tccasm: Accept suffixed cmovCC</title>
<updated>2017-12-03T03:53:50+00:00</updated>
<author>
<name>Michael Matz</name>
<email>matz@suse.de</email>
</author>
<published>2017-12-03T03:53:50+00:00</published>
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The length suffix for cmovCC isn't necessary as the required register
operands always allow length deduction.  But let's be nice to users
and accept them anyway.  Do that without blowing up tables, which means
we don't detect invalid suffixes for the given operands, but so be it.
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The length suffix for cmovCC isn't necessary as the required register
operands always allow length deduction.  But let's be nice to users
and accept them anyway.  Do that without blowing up tables, which means
we don't detect invalid suffixes for the given operands, but so be it.
</pre>
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</entry>
<entry>
<title>x86-64-asm: Fix mov im64,rax encoding</title>
<updated>2017-02-22T23:16:25+00:00</updated>
<author>
<name>Michael Matz</name>
<email>matz@suse.de</email>
</author>
<published>2017-02-22T23:16:25+00:00</published>
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the avoidance of mov im32-&gt;reg64 wasn't working when reg64 was rax.
While fixing this also fix instructions which had the REX prefix
hardcoded in opcode and so didn't support extended registers which
would have added another REX prefix.
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<pre>
the avoidance of mov im32-&gt;reg64 wasn't working when reg64 was rax.
While fixing this also fix instructions which had the REX prefix
hardcoded in opcode and so didn't support extended registers which
would have added another REX prefix.
</pre>
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</entry>
<entry>
<title>tccasm: Don't ignore # in preprocessor directives</title>
<updated>2016-12-15T16:47:11+00:00</updated>
<author>
<name>Michael Matz</name>
<email>matz@suse.de</email>
</author>
<published>2016-08-25T14:40:50+00:00</published>
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Our preprocessor throws away # line-comments in asm mode.
It did so also inside preprocessor directives, thereby
removing stringification.  Parse defines in non-asm mode (but
retain '.' as identifier character inside macro definitions).
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Our preprocessor throws away # line-comments in asm mode.
It did so also inside preprocessor directives, thereby
removing stringification.  Parse defines in non-asm mode (but
retain '.' as identifier character inside macro definitions).
</pre>
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</entry>
<entry>
<title>x86-asm: Accept all 32bit immediates</title>
<updated>2016-12-15T16:47:11+00:00</updated>
<author>
<name>Michael Matz</name>
<email>matz@suse.de</email>
</author>
<published>2016-08-24T15:50:23+00:00</published>
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In particular don't care if they're signed or unsigned, they're all
acceptable as immediates.
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<pre>
In particular don't care if they're signed or unsigned, they're all
acceptable as immediates.
</pre>
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</entry>
<entry>
<title>x86-64-asm: Implement cmpxchg16b</title>
<updated>2016-12-15T16:47:10+00:00</updated>
<author>
<name>Michael Matz</name>
<email>matz@suse.de</email>
</author>
<published>2016-08-08T18:28:21+00:00</published>
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</pre>
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<entry>
<title>tccasm: Implement .set sym, expr</title>
<updated>2016-12-15T16:47:10+00:00</updated>
<author>
<name>Michael Matz</name>
<email>matz@suse.de</email>
</author>
<published>2016-08-07T02:27:32+00:00</published>
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That, as well as "sym = expr", if expr contains symbols.
Slightly tricky because a definition from .set is overridable,
whereas proper definitions aren't.

This doesn't yet allow using this for override tricks from C
and global asm blocks because the symbol tables from C and asm
are separate.
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<pre>
That, as well as "sym = expr", if expr contains symbols.
Slightly tricky because a definition from .set is overridable,
whereas proper definitions aren't.

This doesn't yet allow using this for override tricks from C
and global asm blocks because the symbol tables from C and asm
are separate.
</pre>
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</entry>
<entry>
<title>x86-64-asm: Fix ltr/str and push/pop operands</title>
<updated>2016-12-15T16:47:10+00:00</updated>
<author>
<name>Michael Matz</name>
<email>matz@suse.de</email>
</author>
<published>2016-08-06T21:19:04+00:00</published>
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<content type='text'>
str accepts rm16/r32/r64, and push/pop defaults to 64 when given
memory operands (to 32 on i386).
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str accepts rm16/r32/r64, and push/pop defaults to 64 when given
memory operands (to 32 on i386).
</pre>
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</content>
</entry>
<entry>
<title>x86-64-asm: Implement high %cr registers</title>
<updated>2016-12-15T16:47:09+00:00</updated>
<author>
<name>Michael Matz</name>
<email>matz@suse.de</email>
</author>
<published>2016-08-06T20:48:24+00:00</published>
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</entry>
<entry>
<title>x86-64-asm: Support high registers %r8 - %r15</title>
<updated>2016-12-15T16:47:09+00:00</updated>
<author>
<name>Michael Matz</name>
<email>matz@suse.de</email>
</author>
<published>2016-08-04T02:47:03+00:00</published>
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<content type='text'>
This requires correctly handling the REX prefix.
As bonus we now also support the four 8bit registers
spl,bpl,sil,dil, which are decoded as ah,ch,dh,bh in non-long-mode
(and require a REX prefix as well).
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<pre>
This requires correctly handling the REX prefix.
As bonus we now also support the four 8bit registers
spl,bpl,sil,dil, which are decoded as ah,ch,dh,bh in non-long-mode
(and require a REX prefix as well).
</pre>
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</content>
</entry>
<entry>
<title>x86-asm: Implement prefetchw opcode</title>
<updated>2016-12-15T16:47:08+00:00</updated>
<author>
<name>Michael Matz</name>
<email>matz@suse.de</email>
</author>
<published>2016-07-11T20:06:27+00:00</published>
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